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[m88k] Replace ComplexPattern with PatFrag
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After all, it is not that complex!
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@redstar
redstar committed Apr 26, 2024
1 parent 73ca3e4 commit 37824af
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Showing 2 changed files with 46 additions and 27 deletions.
4 changes: 4 additions & 0 deletions llvm/lib/Target/M88k/GISel/M88kInstructionSelector.cpp
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Expand Up @@ -105,8 +105,10 @@ class M88kInstructionSelector : public InstructionSelector {
int OpIdx = -1) const;

ComplexRendererFns selectAddrRegImm(MachineOperand &Root) const;
#if 0
ComplexRendererFns selectAddrRegReg(MachineOperand &Root) const;
ComplexRendererFns selectAddrRegScaled(MachineOperand &Root) const;
#endif

bool selectFrameIndex(MachineInstr &I, MachineBasicBlock &MBB,
MachineRegisterInfo &MRI) const;
Expand Down Expand Up @@ -409,6 +411,7 @@ M88kInstructionSelector::selectAddrRegImm(MachineOperand &Root) const {
return std::nullopt;
}

#if 0
InstructionSelector::ComplexRendererFns
M88kInstructionSelector::selectAddrRegReg(MachineOperand &Root) const {
MachineInstr &MI = *Root.getParent();
Expand Down Expand Up @@ -460,6 +463,7 @@ M88kInstructionSelector::selectAddrRegScaled(MachineOperand &Root) const {

return std::nullopt;
}
#endif

bool M88kInstructionSelector::selectFrameIndex(MachineInstr &I,
MachineBasicBlock &MBB,
Expand Down
69 changes: 42 additions & 27 deletions llvm/lib/Target/M88k/M88kInstrInfo.td
View file
Expand Up @@ -529,10 +529,25 @@ Addressing modes:
Register indirect with immediate index: ld rD, rS1, si16
Register indirect with index: ld rD, rS1, rS2
Register indirect with scaled index: ld rD, rS1, [rS2]

Register indirect with immediate also matches a frame index, a global address,
and accumulates the the immediate value as much as possible. Therefore a
ComplexPattern i sneeded. The other addressing modes can be expressed with a
pattern fragment.
*/
defm ADDRri : ComplexPatternWithGIEquiv<i32, s32, 2, "selectAddrRegImm", [], [], 10>;
defm ADDRrr : ComplexPatternWithGIEquiv<i32, s32, 2, "selectAddrRegReg", [], []>;
defm ADDRrs : ComplexPatternWithGIEquiv<i32, s32, 2, "selectAddrRegScaled", [], [], 15>;
//defm ADDRrrx : ComplexPatternWithGIEquiv<i32, s32, 2, "selectAddrRegReg", [], []>;
//defm ADDRrs : ComplexPatternWithGIEquiv<i32, s32, 2, "selectAddrRegScaled", [], [], 15>;
def ADDRrr : PatFrag<(ops node:$base, node:$idx),
(ptradd (p0 node:$base), (i32 node:$idx))>;
// Generate pattern fragments for the register indirect with scaled index
// addressing. The prefix in the name is the scale factor.
foreach ShAmt = [0, 1, 2, 3, 4] in {
defvar Size = !shl(1, ShAmt);
def ADDRrs # Size : PatFrags<(ops node:$base, node:$idx),
[(ptradd (p0 node:$base), (shl (i32 node:$idx), (i32 ShAmt))),
(ptradd (p0 node:$base), (mul (i32 node:$idx), (i32 Size)))]>;
}

// Instruction formats with semantics.
class FLoadIndexImm<bits<4> func, bits<2> ty, string option,
Expand Down Expand Up @@ -579,7 +594,7 @@ multiclass StoreIndexImm {

multiclass FLoadUnsigned<bits<1> ty, string option, RegisterOperand cls,
ValueType vt, SDPatternOperator operator,
ComplexPattern addr> {
SDPatternOperator addr> {
def u # option : F_LSINDUSCUNS</*ty=*/ ty, /*user=*/ 0b0, (outs cls:$rd),
(ins GPROpnd:$rs1, GPROpnd:$rs2),
!strconcat("ld.", option, "u"),
Expand Down Expand Up @@ -607,8 +622,8 @@ multiclass LoadUnsigned {
def urib : F_LU<0b1, (outs GPROpnd:$rd), (ins GPROpnd:$rs1, uimm16:$si16),
"ld.bu",
[(set (i32 GPROpnd:$rd), (zextloadi8 (ADDRri (i32 GPROpnd:$rs1), uimm16:$si16)))]>;
defm urr : FLoadUnsigned</*ty=*/ 0b1, "b", GPROpnd, i32, zextloadi8, ADDRrs>;
defm urr : FLoadUnsigned</*ty=*/ 0b0, "h", GPROpnd, i32, zextloadi16, ADDRrs>;
defm urr : FLoadUnsigned</*ty=*/ 0b1, "b", GPROpnd, i32, zextloadi8, ADDRrs1>;
defm urr : FLoadUnsigned</*ty=*/ 0b0, "h", GPROpnd, i32, zextloadi16, ADDRrs2>;
}

// Instruction formats with semantics.
Expand Down Expand Up @@ -641,7 +656,7 @@ multiclass LoadUnscaled {
// Instruction formats with semantics.
multiclass FLoadScaled<bits<4> func, bits<2> ty, string option,
RegisterOperand cls, ValueType vt,
SDPatternOperator operator, ComplexPattern addr> {
SDPatternOperator operator, SDPatternOperator addr> {
def "" : F_LSINDSC<func, ty, /*user=*/ 0b0, (outs cls:$rd), (ins GPROpnd:$rs1, GPROpnd:$rs2),
!if(!eq(option,""), "ld", !strconcat("ld.", option)),
[(set (vt cls:$rd), (operator (addr (i32 GPROpnd:$rs1),
Expand All @@ -653,15 +668,15 @@ multiclass FLoadScaled<bits<4> func, bits<2> ty, string option,
multiclass LoadScaled {
defvar Func = 0b0001;
let regfile = 1 in {
defm rrsd : FLoadScaled<Func, /*ty=*/ 0b00, "d", GPR64Opnd, i64, load, ADDRrs>;
defm rrsw : FLoadScaled<Func, /*ty=*/ 0b01, "", GPROpnd, i32, load, ADDRrs>;
defm rrsb : FLoadScaled<Func, /*ty=*/ 0b11, "b", GPROpnd, i32, sextloadi8, ADDRrs>;
defm rrsh : FLoadScaled<Func, /*ty=*/ 0b10, "h", GPROpnd, i32, sextloadi16, ADDRrs>;
defm rrsd : FLoadScaled<Func, /*ty=*/ 0b00, "d", GPR64Opnd, i64, load, ADDRrs8>;
defm rrsw : FLoadScaled<Func, /*ty=*/ 0b01, "", GPROpnd, i32, load, ADDRrs4>;
defm rrsb : FLoadScaled<Func, /*ty=*/ 0b11, "b", GPROpnd, i32, sextloadi8, ADDRrs1>;
defm rrsh : FLoadScaled<Func, /*ty=*/ 0b10, "h", GPROpnd, i32, sextloadi16, ADDRrs2>;
}
let regfile = 0, Predicates = [MC88110] in {
defm xxsw : FLoadScaled<Func, /*ty=*/ 0b01, "", XROpnd, f32, load, ADDRrs>;
defm xxsd : FLoadScaled<Func, /*ty=*/ 0b00, "d", XROpnd, f64, load, ADDRrs>;
defm xxsq : FLoadScaled<Func, /*ty=*/ 0b10, "x", XROpnd, f80, load, ADDRrs>;
defm xxsw : FLoadScaled<Func, /*ty=*/ 0b01, "", XROpnd, f32, load, ADDRrs4>;
defm xxsd : FLoadScaled<Func, /*ty=*/ 0b00, "d", XROpnd, f64, load, ADDRrs8>;
defm xxsq : FLoadScaled<Func, /*ty=*/ 0b10, "x", XROpnd, f80, load, ADDRrs16>;
}
}

Expand Down Expand Up @@ -704,7 +719,7 @@ multiclass StoreUnscaled {

multiclass FStoreScaled<bits<4> func, bits<2> ty, string option,
RegisterOperand cls, ValueType vt,
SDPatternOperator operator, ComplexPattern addr> {
SDPatternOperator operator, SDPatternOperator addr> {
let through = 0 in {
def "" : F_LSINDSC<func, /*ty=*/ ty, /*user=*/ 0b0,
(outs), (ins cls:$rd, GPROpnd:$rs1, GPROpnd:$rs2),
Expand All @@ -727,15 +742,15 @@ multiclass FStoreScaled<bits<4> func, bits<2> ty, string option,
multiclass StoreScaled {
defvar Func = 0b0010;
let regfile = 1 in {
defm rrsd : FStoreScaled<Func, /*ty=*/ 0b00, "d", GPR64Opnd, i64, store, ADDRrs>;
defm rrsw : FStoreScaled<Func, /*ty=*/ 0b01, "", GPROpnd, i32, store, ADDRrs>;
defm rrsb : FStoreScaled<Func, /*ty=*/ 0b11, "b", GPROpnd, i32, truncstorei8, ADDRrs>;
defm rrsh : FStoreScaled<Func, /*ty=*/ 0b10, "h", GPROpnd, i32, truncstorei16, ADDRrs>;
defm rrsd : FStoreScaled<Func, /*ty=*/ 0b00, "d", GPR64Opnd, i64, store, ADDRrs8>;
defm rrsw : FStoreScaled<Func, /*ty=*/ 0b01, "", GPROpnd, i32, store, ADDRrs4>;
defm rrsb : FStoreScaled<Func, /*ty=*/ 0b11, "b", GPROpnd, i32, truncstorei8, ADDRrs1>;
defm rrsh : FStoreScaled<Func, /*ty=*/ 0b10, "h", GPROpnd, i32, truncstorei16, ADDRrs2>;
}
let regfile = 0, Predicates = [MC88110] in {
defm xrss : FStoreScaled<Func, /*ty=*/ 0b01, "", XROpnd, f32, store, ADDRrs>;
defm xrsd : FStoreScaled<Func, /*ty=*/ 0b00, "d", XROpnd, f64, store, ADDRrs>;
defm xrsx : FStoreScaled<Func, /*ty=*/ 0b10, "x", XROpnd, f80, store, ADDRrs>;
defm xrss : FStoreScaled<Func, /*ty=*/ 0b01, "", XROpnd, f32, store, ADDRrs4>;
defm xrsd : FStoreScaled<Func, /*ty=*/ 0b00, "d", XROpnd, f64, store, ADDRrs8>;
defm xrsx : FStoreScaled<Func, /*ty=*/ 0b10, "x", XROpnd, f80, store, ADDRrs16>;
}
}

Expand Down Expand Up @@ -835,23 +850,23 @@ let mayStore = 1 in {
defm XMEM : Xmem;

// Additional patterns for extending loads.
def : Pat<(i32 (extloadi8 (ADDRrs (i32 GPROpnd:$rs1), (i32 GPROpnd:$rs2)))),
def : Pat<(i32 (extloadi8 (ADDRrs1 (i32 GPROpnd:$rs1), (i32 GPROpnd:$rs2)))),
(LDrrsb GPROpnd:$rs1, GPROpnd:$rs2)>;
def : Pat<(i32 (extloadi8 (ADDRri (i32 GPROpnd:$rs1), uimm16:$si16))),
(LDrib GPROpnd:$rs1, uimm16:$si16)>;
def : Pat<(i32 (extloadi8 (ADDRrr (i32 GPROpnd:$rs1), (i32 GPROpnd:$rs2)))),
(LDrrub GPROpnd:$rs1, GPROpnd:$rs2)>;
def : Pat<(i32 (extloadi16 (ADDRrs (i32 GPROpnd:$rs1), (i32 GPROpnd:$rs2)))),
def : Pat<(i32 (extloadi16 (ADDRrs2 (i32 GPROpnd:$rs1), (i32 GPROpnd:$rs2)))),
(LDrrsh GPROpnd:$rs1, GPROpnd:$rs2)>;
def : Pat<(i32 (extloadi16 (ADDRri (i32 GPROpnd:$rs1), uimm16:$si16))),
(LDrih GPROpnd:$rs1, uimm16:$si16)>;
def : Pat<(i32 (extloadi16 (ADDRrr (i32 GPROpnd:$rs1), (i32 GPROpnd:$rs2)))),
(LDrruh GPROpnd:$rs1, GPROpnd:$rs2)>;

// Additional patterns for floating point types.
def : Pat<(f32 (load (ADDRrs (i32 GPROpnd:$rs1), (i32 GPROpnd:$rs2)))),
def : Pat<(f32 (load (ADDRrs4 (i32 GPROpnd:$rs1), (i32 GPROpnd:$rs2)))),
(LDrrsw GPROpnd:$rs1, GPROpnd:$rs2)>;
def : Pat<(f64 (load (ADDRrs (i32 GPROpnd:$rs1), (i32 GPROpnd:$rs2)))),
def : Pat<(f64 (load (ADDRrs8 (i32 GPROpnd:$rs1), (i32 GPROpnd:$rs2)))),
(LDrrsd GPROpnd:$rs1, GPROpnd:$rs2)>;
def : Pat<(f32 (load (ADDRri (i32 GPROpnd:$rs1), uimm16:$si16))),
(LDriw GPROpnd:$rs1, uimm16:$si16)>;
Expand All @@ -862,9 +877,9 @@ def : Pat<(f32 (load (ADDRrr (i32 GPROpnd:$rs1), (i32 GPROpnd:$rs2)))),
def : Pat<(f64 (load (ADDRrr (i32 GPROpnd:$rs1), (i32 GPROpnd:$rs2)))),
(LDrrud GPROpnd:$rs1, GPROpnd:$rs2)>;

def : Pat<(store (f32 GPROpnd:$rd), (ADDRrs (i32 GPROpnd:$rs1), (i32 GPROpnd:$rs2))),
def : Pat<(store (f32 GPROpnd:$rd), (ADDRrs4 (i32 GPROpnd:$rs1), (i32 GPROpnd:$rs2))),
(STrrsw (f32 GPROpnd:$rd), GPROpnd:$rs1, GPROpnd:$rs2)>;
def : Pat<(store (f64 GPR64Opnd:$rd), (ADDRrs (i32 GPROpnd:$rs1), (i32 GPROpnd:$rs2))),
def : Pat<(store (f64 GPR64Opnd:$rd), (ADDRrs8 (i32 GPROpnd:$rs1), (i32 GPROpnd:$rs2))),
(STrrsd (f64 GPR64Opnd:$rd), GPROpnd:$rs1, GPROpnd:$rs2)>;
def : Pat<(store (f32 GPROpnd:$rd), (ADDRri (i32 GPROpnd:$rs1), uimm16:$si16)),
(STriw (f32 GPROpnd:$rd), GPROpnd:$rs1, uimm16:$si16)>;
Expand Down

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