Skip to content

Commit

Permalink
Handle SIMD16 as well
Browse files Browse the repository at this point in the history
  • Loading branch information
EgorBo committed May 16, 2024
1 parent 02f8ae0 commit 8185bfe
Show file tree
Hide file tree
Showing 2 changed files with 58 additions and 12 deletions.
59 changes: 47 additions & 12 deletions src/coreclr/jit/codegenarm64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2406,14 +2406,31 @@ void CodeGen::genSetRegToConst(regNumber targetReg, var_types targetType, GenTre
}
else
{
// Get a temp integer register to compute long address.
regNumber addrReg = internalRegisters.GetSingle(tree);
simd8_t val = vecCon->gtSimd8Val;
if (ElementsAreSame(val.i32, 2) && emitter::emitIns_valid_imm_for_movi(val.i32[0], EA_4BYTE))
{
emit->emitIns_R_I(INS_movi, attr, targetReg, val.i32[0], INS_OPTS_2S);
}
else if (ElementsAreSame(val.i16, 4) &&
emitter::emitIns_valid_imm_for_movi(val.i16[0], EA_2BYTE))
{
emit->emitIns_R_I(INS_movi, attr, targetReg, val.i16[0], INS_OPTS_4H);
}
else if (ElementsAreSame(val.i8, 8) && emitter::emitIns_valid_imm_for_movi(val.i8[0], EA_1BYTE))
{
emit->emitIns_R_I(INS_movi, attr, targetReg, val.i8[0], INS_OPTS_8B);
}
else
{
// Get a temp integer register to compute long address.
regNumber addrReg = internalRegisters.GetSingle(tree);

simd8_t constValue;
memcpy(&constValue, &vecCon->gtSimdVal, sizeof(simd8_t));
simd8_t constValue;
memcpy(&constValue, &vecCon->gtSimdVal, sizeof(simd8_t));

CORINFO_FIELD_HANDLE hnd = emit->emitSimd8Const(constValue);
emit->emitIns_R_C(INS_ldr, attr, targetReg, addrReg, hnd, 0);
CORINFO_FIELD_HANDLE hnd = emit->emitSimd8Const(constValue);
emit->emitIns_R_C(INS_ldr, attr, targetReg, addrReg, hnd, 0);
}
}
break;
}
Expand Down Expand Up @@ -2454,14 +2471,32 @@ void CodeGen::genSetRegToConst(regNumber targetReg, var_types targetType, GenTre
}
else
{
// Get a temp integer register to compute long address.
regNumber addrReg = internalRegisters.GetSingle(tree);
simd16_t val = vecCon->gtSimd16Val;
if (ElementsAreSame(val.i32, 4) && emitter::emitIns_valid_imm_for_movi(val.i32[0], EA_4BYTE))
{
emit->emitIns_R_I(INS_movi, attr, targetReg, val.i32[0], INS_OPTS_4S);
}
else if (ElementsAreSame(val.i16, 8) &&
emitter::emitIns_valid_imm_for_movi(val.i16[0], EA_2BYTE))
{
emit->emitIns_R_I(INS_movi, attr, targetReg, val.i16[0], INS_OPTS_8H);
}
else if (ElementsAreSame(val.i8, 16) &&
emitter::emitIns_valid_imm_for_movi(val.i8[0], EA_1BYTE))
{
emit->emitIns_R_I(INS_movi, attr, targetReg, val.i8[0], INS_OPTS_16B);
}
else
{
// Get a temp integer register to compute long address.
regNumber addrReg = internalRegisters.GetSingle(tree);

simd16_t constValue;
memcpy(&constValue, &vecCon->gtSimdVal, sizeof(simd16_t));
simd16_t constValue;
memcpy(&constValue, &vecCon->gtSimdVal, sizeof(simd16_t));

CORINFO_FIELD_HANDLE hnd = emit->emitSimd16Const(constValue);
emit->emitIns_R_C(INS_ldr, attr, targetReg, addrReg, hnd, 0);
CORINFO_FIELD_HANDLE hnd = emit->emitSimd16Const(constValue);
emit->emitIns_R_C(INS_ldr, attr, targetReg, addrReg, hnd, 0);
}
}
break;
}
Expand Down
11 changes: 11 additions & 0 deletions src/coreclr/jit/simd.h
Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,17 @@
#ifndef _SIMD_H_
#define _SIMD_H_

template <typename T>
static bool ElementsAreSame(T* array, size_t size)
{
for (size_t i = 1; i < size; i++)
{
if (array[0] != array[i])
return false;
}
return true;
}

struct simd8_t
{
union
Expand Down

0 comments on commit 8185bfe

Please sign in to comment.